Field of the Invention
The present invention generally relates to IC (Integrated Circuit) element testing devices and, more particularly to a testing device which performs variable voltage control for a bump test.
A bump test is one of several tests for IC elements, and is intended to determine how IC elements, such as memory devices, are influenced by variations in the power supply voltage. A conventional testing device, such as a memory tester, has a configuration as shown in FIG. 1A in order to perform the bump test. The testing device shown in FIG. 1A is made up of a main controller 20, a power supply voltage controller 21, a power supply unit 22, and a test pattern generator 23. An IC element 1 to be tested is supplied with a voltage generated by the power supply unit 22, and is supplied with a test pattern generated by the test pattern generator 23.
The operation of the testing device shown in FIG. 1A will be described with reference to FIG. 1B. In order to set the voltage Vcc, which is to be applied to the IC element 1 by the power supply unit 22, to a predetermined level equal to, for example, 5V at the time of testing the IC element 1, the main controller 20 outputs a control instruction, causing the voltage Vcc to be equal to 5V, to the power supply voltage controller 21. In response to the control instruction, the power supply voltage controller 21 turns ON the power supply unit 22. The voltage generated by the power supply unit 22 and applied to the IC element 1 settles at 5V after a stabilizing period, or which is time T1, necessary for the voltage to become stable. Then, the main controller 20 outputs a first test pattern starting instruction to the test pattern generator 23. The test pattern generator 23 generates a first test pattern to be supplied to the IC element 1 to be tested, in a normal state in which the voltage 5V is applied to the IC element 1.
When the bump test is performed, the main controller 20 outputs a control instruction, causing the voltage Vcc to be equal to, for example, 4.5V, to the power supply voltage controller 21. In response to the above control instruction, the power supply voltage controller 21 controls the power supply unit 22 so that the voltage 4.5V is applied to the IC element 1 to be tested. After a stabilizing period, or time T2 necessary for the applied voltage to become stable, the voltage settles at the voltage 4.5V. Then, the main controller 20 outputs a second test pattern starting instruction to the test pattern generator 23. The test pattern generator 23 outputs a second test pattern to the IC element 1 to be tested in a state in which the applied voltage is varied (in the above case, the applied voltage is decreased to 4.5V). The first and second test patterns may be identical to or different from each other.
As described above, conventionally, the output voltage, itself, of the power supply unit 22 is varied by the control instruction generated by the main controller 20. Hence, it takes a long time for the output voltage to settle and the response is not good. In other words, the test pattern cannot be output to the IC element 1 until the output voltage generated by power supply unit 22 becomes stable. A fault will be recovered within the above time, T1 or T2, necessary for the output voltage to settle. In this case, the bump test is no longer effective. For example, a transistor for charging a bit line is temporarily turned OFF in response to a decrease in the power supply voltage, and is returned to the ON state when a predetermined time has passed after the transistor is turned OFF. The bump test cannot detect such a fault.